v29.4-roots.1 · Commit 1: [PATCH 01/13] build: port platform and dependency support

cmake/introspection.cmake

Before: cmake/introspection.cmake · After: cmake/introspection.cmake

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index d4ed4866b9c4d4501ff9c7c7f1edfc8a5e6dea78..0bb852fa175e73c376be8f4d5fe07f7c49d0e555 100644

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cmake/introspection.cmake CHANGED Viewed

@@ -102,6 +102,35 @@ check_cxx_source_compiles("
   " HAVE_SOCKADDR_UN
 )
 # Check for different ways of gathering OS randomness:
 # - Linux getrandom()
 check_cxx_source_compiles("
@@ -164,9 +193,16 @@ if(NOT MSVC)
   # Check for SSE4.1 intrinsics.
   set(SSE41_CXXFLAGS -msse4.1)
-  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
     int main()
     {
       __m128i a = _mm_set1_epi32(0);
@@ -174,31 +210,51 @@ if(NOT MSVC)
       __m128i r = _mm_blend_epi16(a, b, 0xFF);
       return _mm_extract_epi32(r, 3);
     }
-    " HAVE_SSE41
     CXXFLAGS ${SSE41_CXXFLAGS}
   )
   set(ENABLE_SSE41 ${HAVE_SSE41})
   # Check for AVX2 intrinsics.
   set(AVX2_CXXFLAGS -mavx -mavx2)
-  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
     int main()
     {
       __m256i l = _mm256_set1_epi32(0);
       return _mm256_extract_epi32(l, 7);
     }
-    " HAVE_AVX2
     CXXFLAGS ${AVX2_CXXFLAGS}
   )
   set(ENABLE_AVX2 ${HAVE_AVX2})
   # Check for x86 SHA-NI intrinsics.
   set(X86_SHANI_CXXFLAGS -msse4 -msha)
-  check_cxx_source_compiles_with_flags("
     #include <immintrin.h>
     int main()
     {
       __m128i i = _mm_set1_epi32(0);
@@ -206,16 +262,26 @@ if(NOT MSVC)
       __m128i k = _mm_set1_epi32(2);
       return _mm_extract_epi32(_mm_sha256rnds2_epu32(i, j, k), 0);
     }
-    " HAVE_X86_SHANI
     CXXFLAGS ${X86_SHANI_CXXFLAGS}
   )
   set(ENABLE_X86_SHANI ${HAVE_X86_SHANI})
   # Check for ARMv8 SHA-NI intrinsics.
   set(ARM_SHANI_CXXFLAGS -march=armv8-a+crypto)
-  check_cxx_source_compiles_with_flags("
     #include <arm_neon.h>
     int main()
     {
       uint32x4_t a, b, c;
@@ -224,8 +290,37 @@ if(NOT MSVC)
       vsha256su0q_u32(a, b);
       vsha256su1q_u32(a, b, c);
     }
-    " HAVE_ARM_SHANI
     CXXFLAGS ${ARM_SHANI_CXXFLAGS}
   )
   set(ENABLE_ARM_SHANI ${HAVE_ARM_SHANI})
 endif()

   " HAVE_SOCKADDR_UN
 )
+# Check for close_range().
+# NOTE: At least FreeBSD supports the generic variant.
+check_cxx_source_compiles("
+  // same as in src/util/subprocess.cpp
+  #include <limits.h>
+  #include <unistd.h>
+  int main()
+  {
+    return close_range(3, UINT_MAX, 0);
+  }
+  " HAVE_CLOSE_RANGE_GENERIC
+)
+if(NOT HAVE_CLOSE_RANGE_GENERIC)
+  check_cxx_source_compiles("
+    // same as in src/util/subprocess.cpp
+    #define _GNU_SOURCE
+    #include <linux/close_range.h>
+    #include <limits.h>
+    #include <unistd.h>
+    int main()
+    {
+      return close_range(3, UINT_MAX, 0);
+    }
+    " HAVE_CLOSE_RANGE_LINUX
+  )
+endif()
 # Check for different ways of gathering OS randomness:
 # - Linux getrandom()
 check_cxx_source_compiles("
   # Check for SSE4.1 intrinsics.
   set(SSE41_CXXFLAGS -msse4.1)
+  check_cxx_source_compiles_with_flags([[
     #include <immintrin.h>
+    #if defined(__clang__)
+    #pragma clang attribute push(__attribute__((__target__("sse4.1"))), apply_to = function)
+    __attribute__((__target__("arch=skylake-avx512")))
+    #elif defined(__GNUC__)
+    #pragma GCC target ("sse4.1")
+    #endif
     int main()
     {
       __m128i a = _mm_set1_epi32(0);
       __m128i r = _mm_blend_epi16(a, b, 0xFF);
       return _mm_extract_epi32(r, 3);
     }
+    #if defined(__clang__)
+    #pragma clang attribute pop
+    #endif
+    ]] HAVE_SSE41
     CXXFLAGS ${SSE41_CXXFLAGS}
   )
   set(ENABLE_SSE41 ${HAVE_SSE41})
   # Check for AVX2 intrinsics.
   set(AVX2_CXXFLAGS -mavx -mavx2)
+  check_cxx_source_compiles_with_flags([[
     #include <immintrin.h>
+    #if defined(__clang__)
+    #pragma clang attribute push(__attribute__((__target__("avx,avx2"))), apply_to = function)
+    #elif defined(__GNUC__)
+    #pragma GCC target ("avx,avx2")
+    #endif
     int main()
     {
       __m256i l = _mm256_set1_epi32(0);
       return _mm256_extract_epi32(l, 7);
     }
+    #if defined(__clang__)
+    #pragma clang attribute pop
+    #endif
+    ]] HAVE_AVX2
     CXXFLAGS ${AVX2_CXXFLAGS}
   )
   set(ENABLE_AVX2 ${HAVE_AVX2})
   # Check for x86 SHA-NI intrinsics.
   set(X86_SHANI_CXXFLAGS -msse4 -msha)
+  check_cxx_source_compiles_with_flags([[
     #include <immintrin.h>
+    #if defined(__clang__)
+    #pragma clang attribute push(__attribute__((__target__("sse4,sse4.1,sha"))), apply_to = function)
+    #elif defined(__GNUC__)
+    #pragma GCC target ("sse4,sse4.1,sha")
+    #endif
     int main()
     {
       __m128i i = _mm_set1_epi32(0);
       __m128i k = _mm_set1_epi32(2);
       return _mm_extract_epi32(_mm_sha256rnds2_epu32(i, j, k), 0);
     }
+    #if defined(__clang__)
+    #pragma clang attribute pop
+    #endif
+    ]] HAVE_X86_SHANI
     CXXFLAGS ${X86_SHANI_CXXFLAGS}
   )
   set(ENABLE_X86_SHANI ${HAVE_X86_SHANI})
   # Check for ARMv8 SHA-NI intrinsics.
   set(ARM_SHANI_CXXFLAGS -march=armv8-a+crypto)
+  check_cxx_source_compiles_with_flags([[
     #include <arm_neon.h>
+    #if defined(__clang__)
+    #pragma clang attribute push(__attribute__((__target__("armv8-a+crypto"))), apply_to = function)
+    #elif defined(__GNUC__)
+    #pragma GCC target ("armv8-a+crypto")
+    #endif
     int main()
     {
       uint32x4_t a, b, c;
       vsha256su0q_u32(a, b);
       vsha256su1q_u32(a, b, c);
     }
+    #if defined(__clang__)
+    #pragma clang attribute pop
+    #endif
+    ]] HAVE_ARM_SHANI
     CXXFLAGS ${ARM_SHANI_CXXFLAGS}
   )
   set(ENABLE_ARM_SHANI ${HAVE_ARM_SHANI})
+  # Check for POWER8 vector intrinsics.
+  function(check_power8_vector VAR)
+    check_cxx_source_compiles_with_flags([[
+      #include <altivec.h>
+      #include <stdint.h>
+      int main()
+      {
+        unsigned char src[16];
+        __builtin_crypto_vshasigmaw((__vector uint32_t)vec_vsx_ld(0, src), 1, 0xf);
+        return 0;
+      }
+      ]] ${VAR}
+      CXXFLAGS ${POWER8_CXXFLAGS}
+    )
+  endfunction()
+  set(POWER8_CXXFLAGS -mpower8-vector)
+  check_power8_vector(HAVE_POWER8_VECTOR)
+  set(ENABLE_POWER8 ${HAVE_POWER8_VECTOR})
+  if(NOT HAVE_POWER8_VECTOR)
+    set(POWER8_CXXFLAGS -mcpu=power8)
+    check_power8_vector(HAVE_MCPU_POWER8_FOR_VECTOR)
+    set(ENABLE_POWER8 ${HAVE_MCPU_POWER8_FOR_VECTOR})
+  endif()
 endif()